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  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: TRANSISTORES, SOLUÇÕES

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    • ABNT

      DUARTE, Pedro Henrique et al. ISFET fabrication and characterization for hydrogen peroxide sensing. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.646. Acesso em: 24 maio 2024.
    • APA

      Duarte, P. H., Rangel, R. C., Ramos, D. A., Yojo, L. S., Mori, C. A. B., Sasaki, K. R. A., et al. (2023). ISFET fabrication and characterization for hydrogen peroxide sensing. Journal of Integrated Circuits and Systems, 18( 1), 1-4. doi:10.29292/jics.v18i1.646
    • NLM

      Duarte PH, Rangel RC, Ramos DA, Yojo LS, Mori CAB, Sasaki KRA, Agopian PGD, Martino JA. ISFET fabrication and characterization for hydrogen peroxide sensing [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-4.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v18i1.646
    • Vancouver

      Duarte PH, Rangel RC, Ramos DA, Yojo LS, Mori CAB, Sasaki KRA, Agopian PGD, Martino JA. ISFET fabrication and characterization for hydrogen peroxide sensing [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-4.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v18i1.646
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: FRACTAIS, SIMULAÇÃO, AVALIAÇÃO DE DESEMPENHO

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    • ABNT

      FERNANDES, Lucas Almir dos Santos e ALAYO CHÁVEZ, Marco Isaías e MARTINO, João Antonio. Fractional-order MOS capacitor: experimental results and Monte Carlo analysis. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-5, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.660. Acesso em: 24 maio 2024.
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      Fernandes, L. A. dos S., Alayo Chávez, M. I., & Martino, J. A. (2023). Fractional-order MOS capacitor: experimental results and Monte Carlo analysis. Journal of Integrated Circuits and Systems, 18( 1), 1-5. doi:10.29292/jics.v18i1.660
    • NLM

      Fernandes LA dos S, Alayo Chávez MI, Martino JA. Fractional-order MOS capacitor: experimental results and Monte Carlo analysis [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-5.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v18i1.660
    • Vancouver

      Fernandes LA dos S, Alayo Chávez MI, Martino JA. Fractional-order MOS capacitor: experimental results and Monte Carlo analysis [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-5.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v18i1.660
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, NANOTECNOLOGIA

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      TOLEDO, Rodrigo do Nascimento e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-6, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.653. Acesso em: 24 maio 2024.
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      Toledo, R. do N., Martino, J. A., & Agopian, P. G. D. (2023). Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, 18( 1), 1-6. doi:10.29292/jics.v18il.653
    • NLM

      Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v18i1.653
    • Vancouver

      Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v18i1.653
  • Source: Journal of Integrated Circuits and Systems. Unidade: EESC

    Subjects: POTENCIAL ELÉTRICO, DIODOS, ENGENHARIA ELÉTRICA

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      CELINO, Daniel Ricardo et al. A physics-based RTD model accounting for space charge and phonon scattering effects. Journal of Integrated Circuits and Systems, v. 17, n. 1, p. 1-8, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17il.545. Acesso em: 24 maio 2024.
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      Celino, D. R., Souza, A. M. de, Plazas, C. L. M. P., Ragi, R., & Romero, M. A. (2022). A physics-based RTD model accounting for space charge and phonon scattering effects. Journal of Integrated Circuits and Systems, 17( 1), 1-8. doi:10.29292/jics.v17il.545
    • NLM

      Celino DR, Souza AM de, Plazas CLMP, Ragi R, Romero MA. A physics-based RTD model accounting for space charge and phonon scattering effects [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 1): 1-8.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v17il.545
    • Vancouver

      Celino DR, Souza AM de, Plazas CLMP, Ragi R, Romero MA. A physics-based RTD model accounting for space charge and phonon scattering effects [Internet]. Journal of Integrated Circuits and Systems. 2022 ; 17( 1): 1-8.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v17il.545
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: TRANSISTORES, NANOTECNOLOGIA, BAIXA TEMPERATURA

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      SILVA, Vanessa Cristina Pereira da et al. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, v. 17, n. 1, p. 1-6, 2022Tradução . . Disponível em: https://doi.org/10.29292/jics.v17il.550. Acesso em: 24 maio 2024.
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      Silva, V. C. P. da, Leal, J. V. da C., Perina, W. F., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2022). Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C. Journal of Integrated Circuits and Systems, 17( 1), 1-6. doi:10.29292/jics.v17i1.550
    • NLM

      Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v17il.550
    • Vancouver

      Silva VCP da, Leal JV da C, Perina WF, Martino JA, Simoen E, Veloso A, Agopian PGD. Experimental analysis of trade-off between transistor efficiency and unit gain frequency of nanosheet NMOSFET down to -100°C [Internet]. Journal of Integrated Circuits and Systems. 2022 ;17( 1): 1-6.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v17il.550
  • Source: Journal of Integrated Circuits and Systems. Unidades: IF, EP

    Subjects: ÓPTICA ELETRÔNICA, TRANSISTORES, POLÍMEROS (MATERIAIS), FILMES FINOS, CAPACITORES, DIELÉTRICOS, SEMICONDUTORES

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      GARCÍA, Dennis Cabrera et al. Organic Dielectric Films for Flexible Transistors as Gas Sensors. Journal of Integrated Circuits and Systems, v. 15, n. 2, 2020Tradução . . Disponível em: https://doi.org/10.29292/jics.v15i2.170. Acesso em: 24 maio 2024.
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      García, D. C., Eirez Izquierdo, J. E., Cavallari, M. R., Quivy, A. A., & Fonseca, F. J. (2020). Organic Dielectric Films for Flexible Transistors as Gas Sensors. Journal of Integrated Circuits and Systems, 15( 2). doi:10.29292/jics.v15i2.170
    • NLM

      García DC, Eirez Izquierdo JE, Cavallari MR, Quivy AA, Fonseca FJ. Organic Dielectric Films for Flexible Transistors as Gas Sensors [Internet]. Journal of Integrated Circuits and Systems. 2020 ; 15( 2):[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v15i2.170
    • Vancouver

      García DC, Eirez Izquierdo JE, Cavallari MR, Quivy AA, Fonseca FJ. Organic Dielectric Films for Flexible Transistors as Gas Sensors [Internet]. Journal of Integrated Circuits and Systems. 2020 ; 15( 2):[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v15i2.170
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: SEMICONDUTORES

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      ITOCAZU, Vitor Tatsuo et al. Ground Plane Influence on Analog Parameters of Different UTBB nMOSFET Technologies. Journal of Integrated Circuits and Systems, v. 12, n. 2, p. 82-88, 2017Tradução . . Disponível em: https://doi.org/10.29292/jics.v12i2.455. Acesso em: 24 maio 2024.
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      Itocazu, V. T., Sonnenberg, V., Martino, J. A., Simoen, E., & Claeys, C. (2017). Ground Plane Influence on Analog Parameters of Different UTBB nMOSFET Technologies. Journal of Integrated Circuits and Systems, 12( 2), 82-88. doi:10.29292/jics.v12i2.455
    • NLM

      Itocazu VT, Sonnenberg V, Martino JA, Simoen E, Claeys C. Ground Plane Influence on Analog Parameters of Different UTBB nMOSFET Technologies [Internet]. Journal of Integrated Circuits and Systems. 2017 ; 12( 2): 82-88.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v12i2.455
    • Vancouver

      Itocazu VT, Sonnenberg V, Martino JA, Simoen E, Claeys C. Ground Plane Influence on Analog Parameters of Different UTBB nMOSFET Technologies [Internet]. Journal of Integrated Circuits and Systems. 2017 ; 12( 2): 82-88.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v12i2.455
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: SEMICONDUTORES

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      ITOCAZU, Vitor Tatsuo et al. Analytical Model for Threshold Voltage in UTBB SOI MOSFET in Dynamic Threshold Voltage Operation. Journal of Integrated Circuits and Systems, v. 12, n. 2, p. 101-106, 2016Tradução . . Disponível em: https://doi.org/10.29292/jics.v12i2.458. Acesso em: 24 maio 2024.
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      Itocazu, V. T., Martino, J. A., Sasaki, K. R. A., Simoen, E., Claeys, C., & Sonnenberg, V. (2016). Analytical Model for Threshold Voltage in UTBB SOI MOSFET in Dynamic Threshold Voltage Operation. Journal of Integrated Circuits and Systems, 12( 2), 101-106. doi:10.29292/jics.v12i2.458
    • NLM

      Itocazu VT, Martino JA, Sasaki KRA, Simoen E, Claeys C, Sonnenberg V. Analytical Model for Threshold Voltage in UTBB SOI MOSFET in Dynamic Threshold Voltage Operation [Internet]. Journal of Integrated Circuits and Systems. 2016 ; 12( 2): 101-106.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v12i2.458
    • Vancouver

      Itocazu VT, Martino JA, Sasaki KRA, Simoen E, Claeys C, Sonnenberg V. Analytical Model for Threshold Voltage in UTBB SOI MOSFET in Dynamic Threshold Voltage Operation [Internet]. Journal of Integrated Circuits and Systems. 2016 ; 12( 2): 101-106.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v12i2.458
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: TRANSISTORES, DIODOS

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      SANTOS, Gerson et al. Oxygen Plasma Surface Treatment onto ITO Surface for OLEDs Based on Europium Complex. Journal of Integrated Circuits and Systems, v. 10, n. 1, p. 7-12, 2015Tradução . . Disponível em: https://www.sbmicro.org.br/jics/html/artigos/vol10no1/1.pdf. Acesso em: 24 maio 2024.
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      Santos, G., Cavallari, M. R., Pereira, L., & Fonseca, F. J. (2015). Oxygen Plasma Surface Treatment onto ITO Surface for OLEDs Based on Europium Complex. Journal of Integrated Circuits and Systems, 10( 1), 7-12. Recuperado de https://www.sbmicro.org.br/jics/html/artigos/vol10no1/1.pdf
    • NLM

      Santos G, Cavallari MR, Pereira L, Fonseca FJ. Oxygen Plasma Surface Treatment onto ITO Surface for OLEDs Based on Europium Complex [Internet]. Journal of Integrated Circuits and Systems. 2015 ; 10( 1): 7-12.[citado 2024 maio 24 ] Available from: https://www.sbmicro.org.br/jics/html/artigos/vol10no1/1.pdf
    • Vancouver

      Santos G, Cavallari MR, Pereira L, Fonseca FJ. Oxygen Plasma Surface Treatment onto ITO Surface for OLEDs Based on Europium Complex [Internet]. Journal of Integrated Circuits and Systems. 2015 ; 10( 1): 7-12.[citado 2024 maio 24 ] Available from: https://www.sbmicro.org.br/jics/html/artigos/vol10no1/1.pdf
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: MICROELETRÔNICA, RAIOS X

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      TEIXEIRA, Fernando Ferrari et al. Parasitic conduction response to X-ray radiation in unstrained and strained triple-gate SOI MuGFETs. Journal of Integrated Circuits and Systems, v. 9, n. 2, p. 97-102, 2014Tradução . . Disponível em: https://doi.org/10.29292/jics.v9i2.394. Acesso em: 24 maio 2024.
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      Teixeira, F. F., Martino, J. A., Bordallo, C. C. M., Silveira, M. A. G. da, Agopian, P. G. D., Simoen, E., & Claeys, C. (2014). Parasitic conduction response to X-ray radiation in unstrained and strained triple-gate SOI MuGFETs. Journal of Integrated Circuits and Systems, 9( 2), 97-102. doi:10.29292/jics.v9i2.394
    • NLM

      Teixeira FF, Martino JA, Bordallo CCM, Silveira MAG da, Agopian PGD, Simoen E, Claeys C. Parasitic conduction response to X-ray radiation in unstrained and strained triple-gate SOI MuGFETs [Internet]. Journal of Integrated Circuits and Systems. 2014 ; 9( 2): 97-102.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v9i2.394
    • Vancouver

      Teixeira FF, Martino JA, Bordallo CCM, Silveira MAG da, Agopian PGD, Simoen E, Claeys C. Parasitic conduction response to X-ray radiation in unstrained and strained triple-gate SOI MuGFETs [Internet]. Journal of Integrated Circuits and Systems. 2014 ; 9( 2): 97-102.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v9i2.394
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: MICROELETRÔNICA

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      NISSIMOFF, Albert et al. Observation of the Two-Sided Read Window on UTBOX SOI 1T-DRAM: Measurement Setup, Numerical and Empirical Results. Journal of Integrated Circuits and Systems, v. 9, n. 2, p. 91-96, 2014Tradução . . Disponível em: https://doi.org/10.29292/jics.v9i2.393. Acesso em: 24 maio 2024.
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      Nissimoff, A., Claeys, C., Aoulaiche, M., Sasaki, K. L. M., Simoen, E., & Martino, J. A. (2014). Observation of the Two-Sided Read Window on UTBOX SOI 1T-DRAM: Measurement Setup, Numerical and Empirical Results. Journal of Integrated Circuits and Systems, 9( 2), 91-96. doi:10.29292/jics.v9i2.393
    • NLM

      Nissimoff A, Claeys C, Aoulaiche M, Sasaki KLM, Simoen E, Martino JA. Observation of the Two-Sided Read Window on UTBOX SOI 1T-DRAM: Measurement Setup, Numerical and Empirical Results [Internet]. Journal of Integrated Circuits and Systems. 2014 ; 9( 2): 91-96.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v9i2.393
    • Vancouver

      Nissimoff A, Claeys C, Aoulaiche M, Sasaki KLM, Simoen E, Martino JA. Observation of the Two-Sided Read Window on UTBOX SOI 1T-DRAM: Measurement Setup, Numerical and Empirical Results [Internet]. Journal of Integrated Circuits and Systems. 2014 ; 9( 2): 91-96.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v9i2.393
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: NANOELETRÔNICA

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      MARTINO, Márcio Dalla Valle et al. Nanowire Tunnel Field Effect Transistors at High Temperature. Journal of Integrated Circuits and Systems, v. 8, n. 2, p. 110-115, 2013Tradução . . Disponível em: https://doi.org/10.29292/jics.v8i2.381. Acesso em: 24 maio 2024.
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      Martino, M. D. V., Neves, F. S., Agopian, P. G. D., Martino, J. A., Rooyackers, R., & Claeys, C. (2013). Nanowire Tunnel Field Effect Transistors at High Temperature. Journal of Integrated Circuits and Systems, 8( 2), 110-115. doi:10.29292/jics.v8i2.381
    • NLM

      Martino MDV, Neves FS, Agopian PGD, Martino JA, Rooyackers R, Claeys C. Nanowire Tunnel Field Effect Transistors at High Temperature [Internet]. Journal of Integrated Circuits and Systems. 2013 ;8( 2): 110-115.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v8i2.381
    • Vancouver

      Martino MDV, Neves FS, Agopian PGD, Martino JA, Rooyackers R, Claeys C. Nanowire Tunnel Field Effect Transistors at High Temperature [Internet]. Journal of Integrated Circuits and Systems. 2013 ;8( 2): 110-115.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v8i2.381
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: ELETROQUÍMICA, CIRCUITOS INTEGRADOS

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      CARDOSO, Juliana Lopes e SANTOS FILHO, Sebastião Gomes dos. Potentiostatic electrodeposition of Au-Sn alloys from a non-cyanide bath for soldering: influence of reagents concentrations. Journal of Integrated Circuits and Systems, v. 5, n. 2, p. 95-102, 2010Tradução . . Acesso em: 24 maio 2024.
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      Cardoso, J. L., & Santos Filho, S. G. dos. (2010). Potentiostatic electrodeposition of Au-Sn alloys from a non-cyanide bath for soldering: influence of reagents concentrations. Journal of Integrated Circuits and Systems, 5( 2), 95-102.
    • NLM

      Cardoso JL, Santos Filho SG dos. Potentiostatic electrodeposition of Au-Sn alloys from a non-cyanide bath for soldering: influence of reagents concentrations. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 95-102.[citado 2024 maio 24 ]
    • Vancouver

      Cardoso JL, Santos Filho SG dos. Potentiostatic electrodeposition of Au-Sn alloys from a non-cyanide bath for soldering: influence of reagents concentrations. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 95-102.[citado 2024 maio 24 ]
  • Source: Journal of Integrated Circuits and Systems. Unidades: EP, IEE

    Subjects: TRANSISTORES, SEMICONDUTORES

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      CAVALLARI, Marco Roberto et al. PECVD silicon oxynitrite as insulator for MDMO-PPV thin-film transistors. Journal of Integrated Circuits and Systems, v. 5, n. 2, p. 116-124, 2010Tradução . . Acesso em: 24 maio 2024.
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      Cavallari, M. R., Albertin, K. F., Santos, G. dos, Ramos, C. A. S., Pereyra, I., Fonseca, F. J., & Andrade, A. M. de. (2010). PECVD silicon oxynitrite as insulator for MDMO-PPV thin-film transistors. Journal of Integrated Circuits and Systems, 5( 2), 116-124.
    • NLM

      Cavallari MR, Albertin KF, Santos G dos, Ramos CAS, Pereyra I, Fonseca FJ, Andrade AM de. PECVD silicon oxynitrite as insulator for MDMO-PPV thin-film transistors. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 116-124.[citado 2024 maio 24 ]
    • Vancouver

      Cavallari MR, Albertin KF, Santos G dos, Ramos CAS, Pereyra I, Fonseca FJ, Andrade AM de. PECVD silicon oxynitrite as insulator for MDMO-PPV thin-film transistors. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 116-124.[citado 2024 maio 24 ]
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: TRANSISTORES

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      SANTOS, Sara Dereste dos et al. Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs. Journal of Integrated Circuits and Systems, v. 5, n. 2, p. 154-159, 2010Tradução . . Disponível em: https://doi.org/10.29292/jics.v5i2.322. Acesso em: 24 maio 2024.
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      Santos, S. D. dos, Martino, J. A., Simoen, E., & Claeys, C. (2010). Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs. Journal of Integrated Circuits and Systems, 5( 2), 154-159. doi:10.29292/jics.v5i2.322
    • NLM

      Santos SD dos, Martino JA, Simoen E, Claeys C. Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 154-159.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v5i2.322
    • Vancouver

      Santos SD dos, Martino JA, Simoen E, Claeys C. Impact of selective epitaxial growth and uniaxial/biaxial strain on DIBL effect using triple gate FinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 154-159.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v5i2.322
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: ELETROQUÍMICA, ELETRODO, NITRATOS

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      ALMEIDA, F L e SANTOS FILHO, Sebastião Gomes dos e FONTES, M B A. Flow-injection analysis technique used to electrochemically measure nitrite through a gold working electrode modified with 1-2 diaminobenzene (DAB). Journal of Integrated Circuits and Systems, v. 5, n. 2, p. 134-139, 2010Tradução . . Acesso em: 24 maio 2024.
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      Almeida, F. L., Santos Filho, S. G. dos, & Fontes, M. B. A. (2010). Flow-injection analysis technique used to electrochemically measure nitrite through a gold working electrode modified with 1-2 diaminobenzene (DAB). Journal of Integrated Circuits and Systems, 5( 2), 134-139.
    • NLM

      Almeida FL, Santos Filho SG dos, Fontes MBA. Flow-injection analysis technique used to electrochemically measure nitrite through a gold working electrode modified with 1-2 diaminobenzene (DAB). Journal of Integrated Circuits and Systems. 2010 ;5( 2): 134-139.[citado 2024 maio 24 ]
    • Vancouver

      Almeida FL, Santos Filho SG dos, Fontes MBA. Flow-injection analysis technique used to electrochemically measure nitrite through a gold working electrode modified with 1-2 diaminobenzene (DAB). Journal of Integrated Circuits and Systems. 2010 ;5( 2): 134-139.[citado 2024 maio 24 ]
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Assunto: TRANSISTORES

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      PAVANELLO, Marcelo Antonio et al. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs. Journal of Integrated Circuits and Systems, v. 5, n. 2, p. 168-173, 2010Tradução . . Disponível em: https://doi.org/10.29292/jics.v5i2.324. Acesso em: 24 maio 2024.
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      Pavanello, M. A., Martino, J. A., Simoen, E., Claeys, C., Rooyackers, R., & Collaert, N. (2010). Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs. Journal of Integrated Circuits and Systems, 5( 2), 168-173. doi:10.29292/jics.v5i2.324
    • NLM

      Pavanello MA, Martino JA, Simoen E, Claeys C, Rooyackers R, Collaert N. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 168-173.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v5i2.324
    • Vancouver

      Pavanello MA, Martino JA, Simoen E, Claeys C, Rooyackers R, Collaert N. Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs [Internet]. Journal of Integrated Circuits and Systems. 2010 ;5( 2): 168-173.[citado 2024 maio 24 ] Available from: https://doi.org/10.29292/jics.v5i2.324
  • Source: Journal of Integrated Circuits and Systems. Unidades: EP, EESC

    Subjects: MICROELETRÔNICA, CIÊNCIA DA COMPUTAÇÃO

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      OHTA, Ricardo Luís et al. Fabrication of Ti-Si-Ti metal-semiconductor-metal photodetectors using low temperature rapid thermal annealing. Journal of Integrated Circuits and Systems, v. 2, n. 2, 2007Tradução . . Acesso em: 24 maio 2024.
    • APA

      Ohta, R. L., Viana, C. E., Morimoto, N. I., & Borges, B. -H. V. (2007). Fabrication of Ti-Si-Ti metal-semiconductor-metal photodetectors using low temperature rapid thermal annealing. Journal of Integrated Circuits and Systems, 2( 2).
    • NLM

      Ohta RL, Viana CE, Morimoto NI, Borges B-HV. Fabrication of Ti-Si-Ti metal-semiconductor-metal photodetectors using low temperature rapid thermal annealing. Journal of Integrated Circuits and Systems. 2007 ;2( 2):[citado 2024 maio 24 ]
    • Vancouver

      Ohta RL, Viana CE, Morimoto NI, Borges B-HV. Fabrication of Ti-Si-Ti metal-semiconductor-metal photodetectors using low temperature rapid thermal annealing. Journal of Integrated Circuits and Systems. 2007 ;2( 2):[citado 2024 maio 24 ]
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: MICROELETRÔNICA, CIÊNCIA DA COMPUTAÇÃO

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    • ABNT

      ALBERTIN, Katia Franklin e VALLE, M A e PEREYRA, Inés. Study of MOS capacitor with TiO2 and SiO2 and SiO2/TiO2 gate dielectric. Journal of Integrated Circuits and Systems, v. 2, n. 2, 2007Tradução . . Acesso em: 24 maio 2024.
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      Albertin, K. F., Valle, M. A., & Pereyra, I. (2007). Study of MOS capacitor with TiO2 and SiO2 and SiO2/TiO2 gate dielectric. Journal of Integrated Circuits and Systems, 2( 2).
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      Albertin KF, Valle MA, Pereyra I. Study of MOS capacitor with TiO2 and SiO2 and SiO2/TiO2 gate dielectric. Journal of Integrated Circuits and Systems. 2007 ;2( 2):[citado 2024 maio 24 ]
    • Vancouver

      Albertin KF, Valle MA, Pereyra I. Study of MOS capacitor with TiO2 and SiO2 and SiO2/TiO2 gate dielectric. Journal of Integrated Circuits and Systems. 2007 ;2( 2):[citado 2024 maio 24 ]
  • Source: Journal of Integrated Circuits and Systems. Unidade: EP

    Subjects: MICROELETRÔNICA, CIÊNCIA DA COMPUTAÇÃO

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    A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
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      DALTRINI, Andre M et al. Plasma parameters obtained with planar probe and optical emission spectroscopy. Journal of Integrated Circuits and Systems, v. 2, n. 2, 2007Tradução . . Acesso em: 24 maio 2024.
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      Daltrini, A. M., Moshkalev, S., Swart, L., & Verdonck, P. B. (2007). Plasma parameters obtained with planar probe and optical emission spectroscopy. Journal of Integrated Circuits and Systems, 2( 2).
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      Daltrini AM, Moshkalev S, Swart L, Verdonck PB. Plasma parameters obtained with planar probe and optical emission spectroscopy. Journal of Integrated Circuits and Systems. 2007 ; 2( 2):[citado 2024 maio 24 ]
    • Vancouver

      Daltrini AM, Moshkalev S, Swart L, Verdonck PB. Plasma parameters obtained with planar probe and optical emission spectroscopy. Journal of Integrated Circuits and Systems. 2007 ; 2( 2):[citado 2024 maio 24 ]

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